The present invention relates to an image device and a method for forming the same, more particularly, to a complementary metal oxide image device and a method for forming the same.
In a digital camera, important elements in determining the resulting image quality include an optical lens and an image sensor. Light received through a lens is converted into an electric signal by an image sensor. In this manner, a high-quality image can be obtained.
An image sensor consists of a pixel array, namely, a plurality of pixels arranged in a two-dimensional matrix, each pixel including a photosensing means, and transfer and readout devices. Image sensors can be classified into charge-coupled device-type CCD image sensors (referred to as “a CCD”, hereinafter) and complementary metal oxide semiconductor CMOS-type image sensors (referred to as “a CIS”, hereinafter) in accordance with the devices used for transfer and readout. The CCD uses a MOS capacitor for transfer and readout operations. Individual MOS capacitors are located in close proximity to each other, and a charge carrier is tored in a capacitor by a potential difference and transferred into the neighboring capacitor. In contrast, the CIS adopts a switching method by sequentially sensing outputs using MOS transistors as pixels.
The CCD generates less noise in comparison with the CIS, and produces a high quality image, while the CIS is advantageous in that it has a low unit cost of production and low power dissipation. In other words, the CIS is advantageous in that it offers a low power function, a single voltage current, low power dissipation, compatibility with an incorporated CMOS circuit, random access of image data and overall cost reduction, owing to the use of a standard CMOS technology. Accordingly, the CIS has been extended to diversely applied fields such as digital cameras, smart phones, personal data assistants (PDAs), notebook computers, surveillance cameras, barcode detectors, HDTV resolution cameras and various electronic toys.
Contrary to the CCD, the CIS is suitable for integrating an analog device and a MOS device in a single chip using a MOS process. With the continuing trend toward ever-higher integration in semiconductor devices, the gate pattern of a MOS transistor formed in a peripheral circuit-regions has a height that is continually decreasing. If the gate pattern is too high, then an aspect ratio of a space defined between gate patterns is great. Thus, halo ion implantation under these conditions is impossible. Accordingly, it is preferable that a gate pattern of a MOS transistor in a pixel array region is formed to a same height as that of a MOS transistor in the peripheral circuit region.
FIG. 1 is a cross-sectional view illustrating a part of a pixel array region of a conventional image sensor.
Referring to FIG. 1, a device isolation layer 10 is provided at a predetermined region of a semiconductor substrate 100. The device isolation layer 110 defines each pixel active region. After a photoresist layer 130 is formed on top of the gate pattern 120, N-type impurities 140 are ion-implanted to form a photoelectric conversion region 150. At this time, the photoelectric conversion region 150 is formed in a self-aligned manner, to be aligned with the gate pattern 120. However, if the gate pattern 120 is formed relatively thin, the implanted impurity ions with an appropriately 500 keV energy penetrate through the gate pattern 120 to form an undesired N-type impurity diffusion region 160 at a lower portion of the gate pattern 120. As a result, the threshold voltage of a MOS transistor is difficult to control, and a reliable image sensor can not be realized.